VR2R-0587
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Connecting GPUs in the Scale-Out InfiniBand Network - Line hint:
747
Context Before
Broadly, there are three flavors of scale-out deployments for Vera Rubin NVL72. We have InfiniBand-based clusters which employ the NVIDIA Quantum series of switches, NVIDIA Ethernet-based clusters employing Spectrum series switches and lastly, non-Nvidia Ethernet such as Tomahawk-based, Cisco Silicon One or Teralynx-based Ethernet switches. Some Ethernet-based clusters deployed by hyperscalers will use AECs for NIC-to-TOR and switch-to-switch connections, while other Ethernet-based clusters using only optical interconnects will usually adopt a multi-plane and multi-rail networking architecture. What is particularly noteworthy about Vera Rubin NVL72 deployments, however, is that it is the first Nvidia GPU generation where we will be seeing some Co-Packaged-Optics (CPO) deployments in the scale-out backend network.
While there are both InfiniBand and Spectrum-X based clusters, the InfiniBand-based Quantum X800-34XX series of switches is more popular with Neoclouds than with hyperscalers. For InfiniBand, there are two deployment types – the first is the Quantum X800-Q3400 with pluggable optics and the second is the Quantum X800-Q3450 CPO-based switch that use co-packaged Optical Engines (OE) instead of pluggable transceivers.
Evidence
The Quantum X800-Q3400 is logically a multi-plane switch combining 4 Quantum-3 ASICs into a single switch box, though we will dive into this equivalence later in the article. This multi-plane “topology” is abstracted away and as far as network engineers are concerned, the Q3400 is a single switch with 144 ports – or a “little boy” switch.
Context After
Source: SemiAnalysis AI Networking Model ↗
② Atomic Claim
Quantum X800-Q3400 在 logical 上是一個 multi-plane switch，把 4 顆 Quantum-3 ASICs 整合在單一 switch box 內。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/Quantum X800",
"label": "Q3400"
},
"role": "switch_platform"
},
{
"node": {
"id": "04_knowledge_base/ASIC",
"label": "ASIC"
},
"role": "switch_silicon"
}
],
"qualifiers": {
"condition_text": "Quantum-3 is plain text in source claim",
"numeric_mentions": [
"4"
],
"temporal_mentions": []
},
"relation_type": "Q3400_COMBINES_FOUR_SWITCH_ASICS_IN_MULTIPLANE_BOX"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| switch_platform | Q3400 | 04_knowledge_base/Quantum X800 |
| switch_silicon | ASIC | ASIC |
⑤ V2 Draft（需要修正時直接編輯）
Inline repair
只編輯以下三個 Draft 區塊。完成後將
review_action設為REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。
V2 Atomic Claim Draft
Quantum X800-Q3400 在 logical 上是一個 multi-plane switch，把 4 顆 Quantum-3 ASICs 整合在單一 switch box 內。
V2 Semantic Frame Draft
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/Quantum X800",
"label": "Q3400"
},
"role": "switch_platform"
},
{
"node": {
"id": "04_knowledge_base/ASIC",
"label": "ASIC"
},
"role": "switch_silicon"
}
],
"qualifiers": {
"condition_text": "Quantum-3 is plain text in source claim",
"numeric_mentions": [
"4"
],
"temporal_mentions": []
},
"relation_type": "Q3400_COMBINES_FOUR_SWITCH_ASICS_IN_MULTIPLANE_BOX"
}V2 Revision Metadata Draft
{
"epistemic_mode": "ASSERTED",
"mapping_status": "COMPLETE"
}⑥ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。