VR2R-0295
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Relocating ConnectX-9 - Line hint:
413
Context Before
Source: Nvidia VR NVL72 Component BoM and Power Budget Model ↗
For the GB200/GB300, the PCIe signal distance between the GPU/CPU and the CX-7/8 is shorter than the Ethernet/InfiniBand signal distance between the CX-7/8 and the OSFP cages. Previously – having to transmit a 200G Ethernet/InfiniBand signal from the NIC in the back half of the compute tray to the OSFP cage in the front of the compute tray necessitated the use of flyover cables as the signal loss over PCB at 200Gbit/s (uni-directional) per lane is too high.
Evidence
But now that the NIC is closer to the OSFP cage, the lower speed PCIe Gen6 signal (64Gbit/s per lane uni-directional) travels the longer distance. By making the PCIe Gen6 signal longer, the signal can travel over PCB given that PCIe Gen6 has better signal integrity than the higher speed 200G Ethernet/InfiniBand signal.
Context After
PCB vs Flyover Cables
Nevertheless, it is still challenging to drive a PCIe Gen6 signal over around 500mm of PCB distance from the Strata Module to the front of the Orchid Module. In addition to having high quality SerDes, proper signal integrity is still achievable by upgrading PCB materials.
② Atomic Claim
把 PCIe Gen6 signal 的路徑拉長後，仍可讓 signal 走 PCB，因為 PCIe Gen6 的 signal integrity 優於更高速的 200G Ethernet／InfiniBand signal。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/PCIe",
"label": "PCIe Gen6"
},
"role": "host_interface"
},
{
"node": {
"id": "04_knowledge_base/PCB",
"label": "PCB"
},
"role": "routing_medium"
},
{
"node": {
"id": "04_knowledge_base/Ethernet",
"label": "Ethernet"
},
"role": "higher_speed_protocol"
},
{
"node": {
"id": "04_knowledge_base/InfiniBand",
"label": "InfiniBand"
},
"role": "higher_speed_protocol"
}
],
"qualifiers": {
"condition_text": "PCIe Gen6 has better signal integrity than the higher-speed 200G network signal",
"numeric_mentions": [
"200G"
],
"temporal_mentions": []
},
"relation_type": "PCIE6_BETTER_SIGNAL_INTEGRITY_ENABLES_LONGER_PCB_ROUTE"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| host_interface | PCIe Gen6 | PCIe |
| routing_medium | PCB | PCB |
| higher_speed_protocol | Ethernet | Ethernet |
| higher_speed_protocol | InfiniBand | InfiniBand |
⑤ V2 Draft（需要修正時直接編輯）
Inline repair
只編輯以下三個 Draft 區塊。完成後將
review_action設為REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。
V2 Atomic Claim Draft
把 PCIe Gen6 signal 的路徑拉長後，仍可讓 signal 走 PCB，因為 PCIe Gen6 的 signal integrity 優於更高速的 200G Ethernet／InfiniBand signal。
V2 Semantic Frame Draft
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/PCIe",
"label": "PCIe Gen6"
},
"role": "host_interface"
},
{
"node": {
"id": "04_knowledge_base/PCB",
"label": "PCB"
},
"role": "routing_medium"
},
{
"node": {
"id": "04_knowledge_base/Ethernet",
"label": "Ethernet"
},
"role": "higher_speed_protocol"
},
{
"node": {
"id": "04_knowledge_base/InfiniBand",
"label": "InfiniBand"
},
"role": "higher_speed_protocol"
}
],
"qualifiers": {
"condition_text": "PCIe Gen6 has better signal integrity than the higher-speed 200G network signal",
"numeric_mentions": [
"200G"
],
"temporal_mentions": []
},
"relation_type": "PCIE6_BETTER_SIGNAL_INTEGRITY_ENABLES_LONGER_PCB_ROUTE"
}V2 Revision Metadata Draft
{
"epistemic_mode": "ASSERTED",
"mapping_status": "COMPLETE"
}⑥ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。