clm_c39458e8ef634f06b2e0ae4eec60d727_r2

VR2R-0405

回到這篇 SA Coverage

① SA Source

• Source: 開啟完整 SA 文章
• Section: Compute Tray: Power Delivery
• Line hint: 519

Context Before

Source: Nvidia VR NVL72 Component BoM and Power Budget Model ↗

Evidence

50VDC enters the Strata Board via one of the 50V power connectors on both sides of the Strata board. 50VDC is stepped down to 12VDC by the IBC module at the bottom of the Strata Board. Then the 12VDC will be stepped down to 1VDC by the VRM before feeding into the Rubin GPU and Vera CPU. Strata directly receives 50VDC whereas the Bianca board of Grace Blackwell receives 12VDC from the PDB. As the Strata board draws around 4800W of power (equivalent to the TDP of half a general server rack) versus Bianca at 3000W, it is necessary to deliver power to the board at a higher voltage. The benefit of moving 50VDC-12VDC conversion closer is to the reduce current and increase transmission efficiency. 96 Amps at 50V has 17x lower power loss than 400A at 12V due to the quadratic relationship between power loss and current.

Context After

We have the volume and ASP for all the power semis for the all the various VRMs contained in the VR NVL72 Component BoM and Power Budget Model ↗.

② Atomic Claim

Strata 直接接收 50VDC；相較之下，Grace Blackwell 的 Bianca board 從 PDB 接收 12VDC。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/Bianca Board",
        "label": "Bianca board"
      },
      "role": "reference_board"
    },
    {
      "node": {
        "id": "04_knowledge_base/NVIDIA Grace",
        "label": "Grace"
      },
      "role": "reference_cpu"
    },
    {
      "node": {
        "id": "04_knowledge_base/Blackwell",
        "label": "Blackwell"
      },
      "role": "reference_gpu_generation"
    }
  ],
  "qualifiers": {
    "condition_text": "Strata and PDB are plain text in this source claim",
    "numeric_mentions": [
      "50VDC",
      "12VDC"
    ],
    "temporal_mentions": []
  },
  "relation_type": "STRATA_VS_BIANCA_POWER_INPUT"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
reference_board	Bianca board	04_knowledge_base/Bianca Board
reference_cpu	Grace	04_knowledge_base/NVIDIA Grace
reference_gpu_generation	Blackwell	Blackwell

⑤ V2 Draft（需要修正時直接編輯）

Inline repair

只編輯以下三個 Draft 區塊。完成後將 review_action 設為 REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。

V2 Atomic Claim Draft

Strata 直接接收 50VDC；相較之下，Grace Blackwell 的 Bianca board 從 PDB 接收 12VDC。

V2 Semantic Frame Draft

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/Bianca Board",
        "label": "Bianca board"
      },
      "role": "reference_board"
    },
    {
      "node": {
        "id": "04_knowledge_base/NVIDIA Grace",
        "label": "Grace"
      },
      "role": "reference_cpu"
    },
    {
      "node": {
        "id": "04_knowledge_base/Blackwell",
        "label": "Blackwell"
      },
      "role": "reference_gpu_generation"
    }
  ],
  "qualifiers": {
    "condition_text": "Strata and PDB are plain text in this source claim",
    "numeric_mentions": [
      "50VDC",
      "12VDC"
    ],
    "temporal_mentions": []
  },
  "relation_type": "STRATA_VS_BIANCA_POWER_INPUT"
}

V2 Revision Metadata Draft

{
  "epistemic_mode": "ASSERTED",
  "mapping_status": "PARTIAL"
}

⑥ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。