VR-COV-VR-ORCHID-E1S

回到這篇 SA Coverage

① SA Source

Context Before

Situated at the back of the chassis, the Strata module of VR NVL72 is the equivalent of the Bianca board of GB200/300. It houses two Rubin GPUs and one Vera CPU. Unlike Bianca, the LPDDR5X memory for Vera is socketed via SOCAMM module. 8 SOCAMM sockets are placed on the left and right of Vera. Two SOCAMM modules of different capacities are offered, 192GByte and 128GByte, for a maximum of 1,534GByte and a minimum of 1,024GByte per Vera. The Connect-X NICs mezzanine module is also taken off the Strata module as CX-9 is moved to the front of the chassis. Under the cableless design, all the cable connector ports are also removed and replaced by Paladin HD2 board-to-board connectors at the bottom of the module. On the other side, the same set of Paladin HD2 backplane connectors as GB200 and GB300 are identically placed at the back of the module connecting to the NVLink 6 Switches via the NVLink backplane.

Orchid

Evidence

image

Context After

Source: Nvidia VR NVL72 BoM and Power Budget Model ↗

The Orchid Module houses two ConnectX-9 NICs, two 800G transceiver cages, and one E1.S module slot. Four Orchid modules sit at the front of the chassis. With two Orchid modules stacked on top of each other, they occupy the front left and front right chassis space. At the end of the module there is one Paladin HD2 board-to-board connector that mates with the connector on the midplane. The Orchid module is slim and long, allowing the PCIe 6 signal to travel from the midplane to the CX-9 NICs at the front of the chassis.

② Atomic Claim

The Orchid illustration includes one E1.S storage slot per board.

  • Epistemic Mode: ATTRIBUTED
  • Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "E1S_SLOTS_PER_BOARD",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/NVIDIA Orchid Board",
    "label": "NVIDIA Orchid Board"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [
      "1"
    ],
    "value_text": "1"
  }
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
entityNVIDIA Orchid Board04_knowledge_base/NVIDIA Orchid Board

⑤ V2 Draft(需要修正時直接編輯)

Inline repair

只編輯以下三個 Draft 區塊。完成後將 review_action 設為 REQUEST_REPAIR,再手動執行 Repair Preview。
執行腳本前,Draft 不會寫入 Claim Store 或 Graph。

V2 Atomic Claim Draft

The Orchid illustration includes one E1.S storage slot per board.

V2 Semantic Frame Draft

{
  "attribute": "E1S_SLOTS_PER_BOARD",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/NVIDIA Orchid Board",
    "label": "NVIDIA Orchid Board"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [
      "1"
    ],
    "value_text": "1"
  }
}

V2 Revision Metadata Draft

{
  "epistemic_mode": "ATTRIBUTED",
  "mapping_status": "COMPLETE"
}

⑥ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。