VR2R-0197::SPLIT01
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Strata - Line hint:
295
Context Before

Bianca Module. Source: Nvidia VR NVL72 BoM and Power Budget Model ↗
Evidence
Situated at the back of the chassis, the Strata module of VR NVL72 is the equivalent of the Bianca board of GB200/300. It houses two Rubin GPUs and one Vera CPU. Unlike Bianca, the LPDDR5X memory for Vera is socketed via SOCAMM module. 8 SOCAMM sockets are placed on the left and right of Vera. Two SOCAMM modules of different capacities are offered, 192GByte and 128GByte, for a maximum of 1,534GByte and a minimum of 1,024GByte per Vera. The Connect-X NICs mezzanine module is also taken off the Strata module as CX-9 is moved to the front of the chassis. Under the cableless design, all the cable connector ports are also removed and replaced by Paladin HD2 board-to-board connectors at the bottom of the module. On the other side, the same set of Paladin HD2 backplane connectors as GB200 and GB300 are identically placed at the back of the module connecting to the NVLink 6 Switches via the NVLink backplane.
Context After
Orchid

② Atomic Claim
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "CAPACITY_OPTION",
"context_nodes": [
{
"id": "04_knowledge_base/NVIDIA Vera CPU",
"label": "Vera CPU"
}
],
"entity": {
"id": "04_knowledge_base/SOCAMM",
"label": "SOCAMM"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"192GByte"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"192GByte"
],
"value_text": "The Vera CPU SOCAMM offering includes a 192GByte module."
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | SOCAMM | SOCAMM |
| context_0 | Vera CPU | 04_knowledge_base/NVIDIA Vera CPU |
⑤ V2 Draft(需要修正時直接編輯)
Inline repair
只編輯以下三個 Draft 區塊。完成後將
review_action設為REQUEST_REPAIR,再手動執行 Repair Preview。
執行腳本前,Draft 不會寫入 Claim Store 或 Graph。
V2 Atomic Claim Draft
The Vera CPU SOCAMM offering includes a 192GByte module.
V2 Semantic Frame Draft
{
"attribute": "CAPACITY_OPTION",
"context_nodes": [
{
"id": "04_knowledge_base/NVIDIA Vera CPU",
"label": "Vera CPU"
}
],
"entity": {
"id": "04_knowledge_base/SOCAMM",
"label": "SOCAMM"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"192GByte"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"192GByte"
],
"value_text": "The Vera CPU SOCAMM offering includes a 192GByte module."
}
}V2 Revision Metadata Draft
{
"epistemic_mode": "ASSERTED",
"mapping_status": "COMPLETE"
}⑥ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。