VR2R-0294

回到這篇 SA Coverage

① SA Source

Context Before

Source: Nvidia VR NVL72 Component BoM and Power Budget Model ↗

For the GB200/GB300, the PCIe signal distance between the GPU/CPU and the CX-7/8 is shorter than the Ethernet/InfiniBand signal distance between the CX-7/8 and the OSFP cages. Previously – having to transmit a 200G Ethernet/InfiniBand signal from the NIC in the back half of the compute tray to the OSFP cage in the front of the compute tray necessitated the use of flyover cables as the signal loss over PCB at 200Gbit/s (uni-directional) per lane is too high.

Evidence

But now that the NIC is closer to the OSFP cage, the lower speed PCIe Gen6 signal (64Gbit/s per lane uni-directional) travels the longer distance. By making the PCIe Gen6 signal longer, the signal can travel over PCB given that PCIe Gen6 has better signal integrity than the higher speed 200G Ethernet/InfiniBand signal.

Context After

PCB vs Flyover Cables

Nevertheless, it is still challenging to drive a PCIe Gen6 signal over around 500mm of PCB distance from the Strata Module to the front of the Orchid Module. In addition to having high quality SerDes, proper signal integrity is still achievable by upgrading PCB materials.

② Atomic Claim

現在 NIC 更靠近 OSFP cage,因此較低速的 PCIe Gen6 signal(每 lane 64Gbit/s、uni-directional)改為走較長距離。

  • Epistemic Mode: ASSERTED
  • Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/NIC",
        "label": "NIC"
      },
      "role": "network_device"
    },
    {
      "node": {
        "id": "04_knowledge_base/PCIe",
        "label": "PCIe Gen6"
      },
      "role": "host_interface"
    }
  ],
  "qualifiers": {
    "condition_text": "OSFP cage is plain text; rate is per lane uni-directional",
    "numeric_mentions": [
      "64Gbit/s"
    ],
    "temporal_mentions": [
      "now"
    ]
  },
  "relation_type": "LONGER_DISTANCE_ASSIGNED_TO_LOWER_SPEED_PCIE6_SIGNAL"
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
network_deviceNICNIC
host_interfacePCIe Gen6PCIe

⑤ V2 Draft(需要修正時直接編輯)

Inline repair

只編輯以下三個 Draft 區塊。完成後將 review_action 設為 REQUEST_REPAIR,再手動執行 Repair Preview。
執行腳本前,Draft 不會寫入 Claim Store 或 Graph。

V2 Atomic Claim Draft

現在 NIC 更靠近 OSFP cage,因此較低速的 PCIe Gen6 signal(每 lane 64Gbit/s、uni-directional)改為走較長距離。

V2 Semantic Frame Draft

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/NIC",
        "label": "NIC"
      },
      "role": "network_device"
    },
    {
      "node": {
        "id": "04_knowledge_base/PCIe",
        "label": "PCIe Gen6"
      },
      "role": "host_interface"
    }
  ],
  "qualifiers": {
    "condition_text": "OSFP cage is plain text; rate is per lane uni-directional",
    "numeric_mentions": [
      "64Gbit/s"
    ],
    "temporal_mentions": [
      "now"
    ]
  },
  "relation_type": "LONGER_DISTANCE_ASSIGNED_TO_LOWER_SPEED_PCIE6_SIGNAL"
}

V2 Revision Metadata Draft

{
  "epistemic_mode": "ASSERTED",
  "mapping_status": "PARTIAL"
}

⑥ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。