clm_ecc2d66e747f4a62aede75e099cc8bf2_r1

VR2-0585

① SA Source

• Source: 開啟完整 SA 文章
• Section: GB200 Hardware Architecture - Component Supply Chain & BOM
• Line hint: 705

Context Before

Although the NVLink 6 Switch used in the VR NVL72 system delivers the same per switch 28.8T aggregate bandwidth as NVLink 5 Switch, the SerDes speed on the NVLink 6 Switch is double the SerDes speed of NVLink 5 Switch but with the same number of DPs. As such, in order to deliver double the aggregate scale-up bandwidth required for NVLink 6, Vera Rubin NVL72 racks will contain double the number of NVLink Switches as compared to GB200 racks. This translates to four NVLink Switch chips per tray on 9 switch trays, or 36 NVLink Switch chips in each rack.

Each VR NVL72 Switch tray contains four NVLink 6 Switch ASICs and one system management module. The design of the Rubin NVLink 6 Switch tray is also simpler and relatively seamless compared to the first Oberon NVLink 5 Switch released for GB200 because Rubin NVLink 6 Switch trays will not use flyover cables. As such, all NVLink signals will run over the PCB.

Evidence

Connected to the NVSwitch tray is the system management module (SMM) that comes with a CPU and acts as a host to the switch tray

Context After

Source: Nvidia VR NVL72 Component BoM and Power Budget Model ↗

② Atomic Claim

與 NVSwitch tray 連接的是 system management module（SMM），其中包含 CPU，並作為 switch tray 的 host。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "additional_nodes": [],
  "frame_type": "RELATION",
  "object": {
    "id": "04_knowledge_base/CPU",
    "label": "CPU"
  },
  "predicate": "CONNECTS_TO",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "subject": {
    "id": "04_knowledge_base/NVSwitch",
    "label": "NVSwitch"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
subject	NVSwitch	NVSwitch
object	CPU	CPU

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。