VR2-0060

① SA Source

Context Before

Increasing clock speed 25% from 1.90GHz to 2.38GHz

Additionally, Nvidia claims up to an effective 50 PFLOPS of FP4 performance can be achieved with an updated 3rd generation Transformer Engine that replaces 2:4 structured sparsity from prior generations. We will detail this architectural feature for Rubin below.

Evidence

the Tensor core width doubling only applies to FP4 and FP8

Context After

On the memory front, the move to HBM4 means double the bus width per stack, running at 10.8 GT/s for 22TB/s total bandwidth or 2.75x Blackwell at the same 288GB capacity as GB300. Memory bandwidth has been upgraded significantly from the original 13TB/s advertised at GTC 2025. In order to catch up to AMD MI450’s memory bandwidth, Nvidia requested much higher HBM4 pin speeds from the DRAM suppliers - well above the speeds that was in the JEDEC specification for HBM4.

While Nvidia is targeting 22TB/s, we understand that memory suppliers are having challenges hitting Nvidia’s requirements and we see it likely that initial shipments will come in slightly below at closer to 20TB/s. We have discussed the implications to SK Hynix, Samsung, and Micron extensively for Accelerator and HBM model subscribers. Micron is well behind Samsung and Hynix and we believe they are effectively out of the picture for Rubin HBM4. We have more details on qualifications and pin speeds in the Accelerator and HBM model

② Atomic Claim

Rubin 的 Tensor Core width 加倍僅適用於 FP4FP8

  • Epistemic Mode: ASSERTED
  • Mapping Status: PARTIAL

③ Semantic Frame

{
  "comparison_expression": "Rubin 的 Tensor Core width 加倍僅適用於 FP4 與 FP8。",
  "entities": [
    {
      "id": "04_knowledge_base/Tensor Core",
      "label": "Tensor Core"
    },
    {
      "id": "04_knowledge_base/FP4",
      "label": "FP4"
    },
    {
      "id": "04_knowledge_base/FP8",
      "label": "FP8"
    }
  ],
  "frame_type": "COMPARISON",
  "metric": "UNSPECIFIED_METRIC",
  "operator": "MULTIPLE_OF",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  }
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
comparison_entity_0Tensor Core04_knowledge_base/Tensor Core
comparison_entity_1FP4FP4
comparison_entity_2FP8FP8

⑤ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。