VR2-0604
① SA Source
- Source: 開啟完整 SA 文章
- Section:
GB200 Hardware Architecture - Component Supply Chain & BOM - Line hint:
731
Context Before

Vera Rubin NVL72 Scale-up Topology. Source: SemiAnalysis AI Networking Model ↗
Evidence
Context After
The HGX Rubin NVL8 server consists of eight 800G CX-9 NIC packages – one NIC per GPU – which means that the scale-out bandwidth does not increase from its predecessor, the HGX B300 server. The Vera Rubin NVL72 deployment on the other hand doubles the per GPU scale-out bandwidth to 1.6T, but not by doubling the bandwidth per NIC. Rather, the “1.6T NIC” attached to each Rubin chip is comprised of two 800G CX-9 packages that is connected to the Vera CPU by PCIe Gen 6.0 lanes.
Each compute tray on the VR NVL72 has eight 800G CX-9 NICs, but there are two possibilities for the number of OSFP cages - either one 1.6T OSFP cage per GPU for a total of 4 per compute tray, or two 800G OSFP cages per GPU for a total of 8 cages per compute tray. We think that the latter would be the more popular deployment assumption, and will be the base case for our discussion of scale-out networking architectures in later sections of the article.
② Atomic Claim
VR NVL72 system 的 GPUs 與 scale-up switches 透過 copper cables 互連;VR HGX system 則由每台 server 8 顆 Rubin GPUs 與 4 顆 NVLink Switch chips 組成。
- Epistemic Mode:
ASSERTED - Mapping Status:
PARTIAL
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/VR NVL72",
"label": "VR NVL72"
},
"role": "system_or_subject"
},
{
"node": {
"id": "04_knowledge_base/GPU",
"label": "GPUs"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/Copper",
"label": "copper"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/HGX",
"label": "HGX"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/NVLink",
"label": "NVLink"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/Vera Rubin",
"label": "Rubin"
},
"role": "context_entity"
}
],
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"8",
"4"
],
"temporal_mentions": []
},
"relation_type": "HAS_COMPONENT"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| system_or_subject | VR NVL72 | 04_knowledge_base/VR NVL72 |
| component | GPUs | GPU |
| component | copper | Copper |
| component | HGX | HGX |
| component | NVLink | NVLink |
| context_entity | Rubin | 04_knowledge_base/Vera Rubin |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。