VR2-0426
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Compute Tray: Power Delivery - Line hint:
519
Context Before
Source: Nvidia VR NVL72 Component BoM and Power Budget Model ↗
Evidence
50VDC enters the Strata Board via one of the 50V power connectors on both sides of the Strata board
Context After
We have the volume and ASP for all the power semis for the all the various VRMs contained in the VR NVL72 Component BoM and Power Budget Model ↗.
② Atomic Claim
50VDC 透過 Strata board 兩側其中一個 50V power connector 進入 Strata Board。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"additional_nodes": [],
"frame_type": "RELATION",
"object": {
"id": "04_knowledge_base/NVIDIA Strata Board",
"label": "Strata board"
},
"predicate": "CONNECTS_TO",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"50"
],
"temporal_mentions": []
},
"subject": {
"id": "04_knowledge_base/50VDC",
"label": "50VDC"
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| subject | 50VDC | 50VDC |
| object | Strata board | 04_knowledge_base/NVIDIA Strata Board |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。