clm_703d81abd09d4a1e8fbd9f270ab16713_r1

VR2-0020

① SA Source

• Source: 開啟完整 SA 文章
• Section: Vera Rubin – Extreme Co-Design: An Evolution from Grace Blackwell Oberon
• Line hint: 33

Context Before

In the sections below, we will discuss the 6 silicon products of the Vera Rubin platform at the silicon level. Then, we will discuss the rack and compute tray evolution from Grace Blackwell to Vera Rubin from the design perspective and the implication to components: cables, connectors, PCB, thermal, mechanical, and power.

Next, we will discuss the major networks of the VR NVL72 system, namely the scale up NVLink 6 network and the backend scale out network. We will discuss the logistical implications of much more limited hyperscaler customisation and the assembly supplier landscape.

Evidence

We will also cover some of the challenges with regards to HBM ramp for Micron, SK Hynix, and Samsung

Context After

Today we are also launching the VR NVL72 Component BoM and Power Budget Model ↗. It provides a system-level bill of materials and power budget analysis for the VR NVL72 system covered in this article. This is important because various vendors and their shares of the subcomponents will drive whether they are winners or losers in the $500B Rubin buildout. The downstream impacts and dislocations in the market are large. The model covers:

② Atomic Claim

文章也將討論 Micron、SK Hynix 與 Samsung 在 HBM ramp 上面臨的部分挑戰。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "attribute": "UNSPECIFIED_ATTRIBUTE",
  "context_nodes": [
    {
      "id": "02_companies/000660",
      "label": "SK Hynix"
    },
    {
      "id": "02_companies/005930",
      "label": "Samsung"
    },
    {
      "id": "04_knowledge_base/HBM",
      "label": "HBM"
    }
  ],
  "entity": {
    "id": "02_companies/MU",
    "label": "Micron"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "文章也將討論 Micron、SK Hynix 與 Samsung 在 HBM ramp 上面臨的部分挑戰。"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	Micron	MU
context_0	SK Hynix	000660
context_1	Samsung	005930
context_2	HBM	HBM

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。