clm_4ce0aec7f23b451b883274b9773367bd_r1

VR2-0602

① SA Source

• Source: 開啟完整 SA 文章
• Section: GB200 Hardware Architecture - Component Supply Chain & BOM
• Line hint: 725

Context Before

Zooming out, backplane copper cables are used to connect NVLink Switch trays to the GPU trays for the VR NVL72 system. Although the bandwidth doubles, with bi-directional SerDes, the number of cables required does not change from the GB300 backplane generation to the Vera Rubin NVL72 backplane generation. The number of connectors and the number of DPs per connector also does not change from Grace Blackwell NVL72 to VR NVL72.

Evidence

Grace Blackwell NVL72 Scale-up Topology

Context After

Vera Rubin NVL72 Scale-up Topology. Source: SemiAnalysis AI Networking Model ↗

② Atomic Claim

此處展示 Grace Blackwell NVL72 Scale-up Topology。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "SCALABILITY",
  "context_nodes": [
    {
      "id": "04_knowledge_base/Blackwell",
      "label": "Blackwell"
    }
  ],
  "entity": {
    "id": "04_knowledge_base/NVIDIA Grace",
    "label": "Grace"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "此處展示 Grace Blackwell NVL72 Scale-up Topology。"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	Grace	04_knowledge_base/NVIDIA Grace
context_0	Blackwell	Blackwell

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。