VR2-0120
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Vera - Line hint:
149
Context Before
Source: Nvidia VR NVL72 Component BoM and Power Budget Model ↗
Evidence
Core count increases from 72 to 88, with 91 cores printed on die to leave redundancy for yield improvement
Context After
NVLink 6 Switch
② Atomic Claim
關於 Vera CPU：Core count 從 72 增至 88，die 上實際印製 91 cores，以保留冗餘來提高良率。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "CORE_COUNT",
"context_nodes": [],
"entity": {
"id": "04_knowledge_base/NVIDIA Vera CPU",
"label": "Vera CPU"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"72",
"88",
"91"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"72",
"88",
"91"
],
"value_text": "關於 Vera CPU：Core count 從 72 增至 88，die 上實際印製 91 cores，以保留冗餘來提高良率。"
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | Vera CPU | 04_knowledge_base/NVIDIA Vera CPU |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。