VR2-0339
① SA Source
- Source: 開啟完整 SA 文章
- Section:
PCB vs Flyover Cables - Line hint:
439
Context Before
Geometry loss describes the insertion loss incurred from abrupt structures of the PCB traces. Real PCB channels include many abrupt structures, such as vias and layer swaps. These are like bumps in a highway, and signals could reflect backward and be interrupted increasing insertion loss.
Another factor that affects signal performance is cross-talk. Given the increase in the number of I/Os per GPU, lane density in the PCB also increases. Cross-talk describes the scenario where the copper traces are too close to each other and the signal from one lane affects the signal in a neighboring lane. Some copper traces are designed for power as well. When the power lanes are too close to the signal lanes, noise from the power lanes can also modulate the signal as well.
Evidence
In conclusion, insertion loss scales with signal frequency, and high-speed signal suffers more insertion loss from PCB than from fly over cables
Context After
For VR NVL72, the design has turned toward cableless given the higher density and manufacturing complexity of AI server. The cost saved on improving higher manufacturing yields and assembly time reduction more than offsets the higher cost of the upgraded PCB materials. It is critical that all the factors that contribute towards insertion loss in the PCB are mitigated, hence PCB material upgrades are necessary for VR NVL72. We break down the cost by component here ↗.
PCB Materials Upgrade and Area Growth
② Atomic Claim
總結而言，insertion loss 會隨 signal frequency 上升，而高速 signal 在 PCB 上承受的 insertion loss 高於 flyover cables。
- Epistemic Mode:
ASSERTED - Mapping Status:
PARTIAL
③ Semantic Frame
{
"comparison_expression": "總結而言，insertion loss 會隨 signal frequency 上升，而高速 signal 在 PCB 上承受的 insertion loss 高於 flyover cables。",
"entities": [
{
"id": "04_knowledge_base/Insertion loss",
"label": "insertion loss"
},
{
"id": "04_knowledge_base/PCB",
"label": "PCB"
}
],
"frame_type": "COMPARISON",
"metric": "UNSPECIFIED_METRIC",
"operator": "GREATER_THAN",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [],
"temporal_mentions": []
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| comparison_entity_0 | insertion loss | 04_knowledge_base/Insertion loss |
| comparison_entity_1 | PCB | PCB |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。