clm_b7448c8fd08c4a7982fb79263804afc7_r1

2025-12-04_aws-trainium3-deep-dive-a-potential::TRN3-0015

① SA Source

• Source: 開啟完整 SA 文章
• Section: Trainium3 Server Types and Specifications Overview
• Line hint: 105

Context Before

Source: SemiAnalysis, AWS

Evidence

The HBM3E is upgraded to 12-high for Trainium3 which brings memory capacity to 144GB per chip.

Context After

The scale-up bandwidth per Trainium3 chip is doubled vs Trn2 by moving to PCIe Gen 6 which offers 64Gbps per lane (uni-directional) vs the 32Gbps per lane offered by PCIe Gen 5. Trainium3 uses 144 active lanes of PCIe for scale up, which on Gen6 means each Trainium3 supports 1.2 TB/s (uni-directional) of scale-up bandwidth per chip.

Scale-out bandwidth support is doubled to a maximum of 400 Gb/s, but most Trainium3 racks produced will stick with the 200Gb/s per XPU scale-out speed that was used for Trn2.

② Atomic Claim

Trainium3 升級至 12-high HBM3E，單 chip memory capacity 為 144GB。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "hbm_capacity",
  "context_nodes": [
    {
      "id": "04_knowledge_base/HBM3E",
      "label": "HBM3E"
    }
  ],
  "entity": {
    "id": "04_knowledge_base/Trainium",
    "label": "Trainium3"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [
      "12-high",
      "144GB"
    ],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [
      "12-high",
      "144GB"
    ],
    "value_text": "12-high HBM3E; 144GB per chip"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	Trainium3	Trainium
context_0	HBM3E	HBM3E

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。