2025-12-04_aws-trainium3-deep-dive-a-potential::TRN3-0029
① SA Source
- Source: 開啟完整 SA 文章
- Section:
NeuronLink PCIe PHY and UALink Switches - Line hint:
365
Context Before
Source: SemiAnalysis
NeuronLink PCIe PHY and UALink Switches
Evidence
Context After
The first two switch tray generations adopt a multi-plane scale up switch architecture that does not technically allow full all-to-all communication within the rack without multiple hops. The Gen1 switches will be rather quickly replaced higher bandwidth and higher radix switches. The table below illustrates the scale-up characteristics of the six different combinations across the two rack SKUs and three different switch tray generations.

② Atomic Claim
Trainium3 scale-up switch roadmap 為 160-lane Scorpio X PCIe 6.0 → 320-lane Scorpio-X → 72+ port UALink。
- Epistemic Mode:
EXPECTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "switch_generation_sequence",
"context_nodes": [
{
"id": "04_knowledge_base/PCIe",
"label": "PCIe"
},
{
"id": "04_knowledge_base/UALink",
"label": "UALink"
}
],
"entity": {
"id": "04_knowledge_base/Trainium",
"label": "Trainium3"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"160",
"320",
"72+"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"160",
"320",
"72+"
],
"value_text": "160-lane PCIe 6.0 -> 320-lane PCIe 6.0 -> 72+ port UALink"
}
}④ Canonical Entity Mapping
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。