2025-06-13_amd-advancing-ai-mi350x-and-mi400-ualoe72-mi500-ual256::AMD25-0017
① SA Source
- Source: 開啟完整 SA 文章
- Section:
MI400 Series Flexible Input Output (I/O) - Line hint:
299
Context Before
MI400 Series Flexible Input Output (I/O)
AMD has learned from their mistake on the MI300X in deploying an Infinity Fabric that was much worse than NVLink. They have also recognized they don’t have the hardware talent to execute on an NVSwitch equivalent. Furthermore, they also do not want to encroach on the industry ecosystem by verticalizing too much. As such, they have gone with the shotgun approach of supporting everything under the sun.
Evidence
These I/O lanes can support PCIe 6.0, Infinity Fabric at 64G, UALink at 128G, xGMI 4 at 128G (which is somewhat of a superset of UALink), as well as Infinity Fabric over Ethernet at 212G.
Context After
With Flexible I/O, AMD can deploy scale up UALink or UALink over Ethernet. They can support SSDs directly attached to the GPU. They can attach NICs via UALink. The possibilities are almost endless. It is an incredibly large array of permutations for systems and allows for much change and evolution.
However, executing on the silicon engineering to allow these different forms of I/O is not easy. AMD must make SerDes and data paths that work with all of these different permutations. This is an incredibly hard engineering path fraught with engineering risk.
② Atomic Claim
MI400 flexible I/O lanes 支援 PCIe 6.0、Infinity Fabric 64G、UALink 128G、xGMI4 128G、IF-over-Ethernet 212G。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "flexible_io_standards",
"context_nodes": [
{
"id": "04_knowledge_base/PCIe",
"label": "PCIe"
},
{
"id": "04_knowledge_base/Infinity Fabric",
"label": "Infinity Fabric"
},
{
"id": "04_knowledge_base/UALink",
"label": "UALink"
},
{
"id": "04_knowledge_base/Ethernet",
"label": "Ethernet"
}
],
"entity": {
"id": "04_knowledge_base/MI400",
"label": "MI400"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"64G",
"128G",
"128G",
"212G"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"64G",
"128G",
"128G",
"212G"
],
"value_text": "PCIe 6.0; IF 64G; UALink 128G; xGMI4 128G; IFoE 212G"
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | MI400 | MI400 |
| context_0 | PCIe | PCIe |
| context_1 | Infinity Fabric | 04_knowledge_base/Infinity Fabric |
| context_2 | UALink | UALink |
| context_3 | Ethernet | Ethernet |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。