2025-06-13_amd-advancing-ai-mi350x-and-mi400-ualoe72-mi500-ual256::AMD25-0019
① SA Source
- Source: 開啟完整 SA 文章
- Section:
The MI400 Series is UALoE and Not UALink - Line hint:
317
Context Before
The reason why AMD could not deploy actual UALink is that UALink switches from Astera Labs and Marvell don’t come until 2027, and Broadcom did not want to develop an actual UALink switch.
It is well known that Broadcom stopped being actively involved in UALink a few quarters ago and instead started developing their own scale-up protocol called Scale Up Ethernet (Broadcom SUE). This left AMD in a tough spot as without a scale up switch in 2026, its systems would be uncompetitive against Nvidia. AMD begged Broadcom to come back to UALink and as a result, AMD agreed to change the specs of UALink to now include running the UALink protocol over Ethernet just as Broadcom wanted.
Evidence
Context After

Source: AMD
② Atomic Claim
MI400 UALoE paper scale-up 為 1.8TByte/s per GPU、world size 72 logical GPUs,與 VR200 NVL144 同級。
- Epistemic Mode:
EXPECTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "scale_up_spec",
"context_nodes": [
{
"id": "04_knowledge_base/GPU",
"label": "GPU"
},
{
"id": "04_knowledge_base/UALoE",
"label": "UALoE"
}
],
"entity": {
"id": "04_knowledge_base/MI400",
"label": "MI400"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"1.8TByte/s",
"72"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"1.8TByte/s",
"72"
],
"value_text": "1.8TByte/s per GPU; 72 logical-GPU world size"
}
}④ Canonical Entity Mapping
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。