GB2-0009

① SA Source

Context Before

The GB200 NVL72 racks consists of 18 1U compute trays and 9 NVSwitch trays. Each compute tray is 1U in height and contains 2 Bianca boards. Each Bianca board is 1 Grace CPU and 2 Blackwell GPUs. The NVSwitch trays have two 28.8Tb/s NVSwitch5 ASICs.

With the exception of one hyperscaler who plans to deploy this as the primary variant, we believe that this version will be rarely deployed until Blackwell Ultra as most datacenter infrastructure cannot support this high of a rack density even with direct-to-chip liquid cooling (DLC).

Evidence

Each chip has 14.4Tb/s pointing backward toward the backplane and 14.4Tb/s pointing toward the front plate.

Context After

image

Source: SemiAnalysis

② Atomic Claim

GB200 NVL36x2 的 NVSwitch5 ASIC 每顆有 14.4Tb/s 朝向 backplane,另有 14.4Tb/s 朝向前面板。

  • Epistemic Mode: ASSERTED
  • Mapping Status: PARTIAL

③ Semantic Frame

{
  "attribute": "per_asic_directional_bandwidth",
  "context_nodes": [
    {
      "id": "04_knowledge_base/Backplane",
      "label": "backplane"
    },
    {
      "id": "04_knowledge_base/NVL36",
      "label": "NVL36"
    }
  ],
  "entity": {
    "id": "04_knowledge_base/NVSwitch",
    "label": "NVSwitch"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": "NVSwitch5 ASIC in NVL36x2",
    "numeric_mentions": [
      "14.4Tb/s",
      "14.4Tb/s"
    ],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [
      "14.4Tb/s",
      "14.4Tb/s"
    ],
    "value_text": "14.4Tb/s toward backplane and 14.4Tb/s toward front plate"
  }
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
entityNVSwitchNVSwitch
context_0backplaneBackplane
context_1NVL36NVL36

⑤ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。