SA260324R-0324
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Feynman NVL1152 Networking Topologies - Line hint:
406
Context Before
To double the scale-up bandwidth using copper interconnect, NVIDIA would have to achieve a per lane bandwidth of 448Gbit/s uni-di (and implemented with simultaneous bi-directional SerDes so that each physical channel carries 448G of RX and 448G of TX).
Evidence
However, this is a challenging feat as they would first have to prove the feasibility of 448Gb/s PAM4 SerDes at large volumes, then implement echo cancellation to achieve bidirectional bandwidth, which is in itself extremely difficult.
Context After
We believe Nvidia is going for 448G uni-di only.
② Atomic Claim
這很困難：首先必須證明 448Gb/s PAM4 SerDes 能大規模量產，之後還要實作 echo cancellation 才能達成 bidirectional bandwidth。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/PAM4",
"label": "PAM4"
},
"role": "modulation"
},
{
"node": {
"id": "04_knowledge_base/SerDes",
"label": "SerDes"
},
"role": "serdes"
},
{
"node": {
"id": "04_knowledge_base/Echo cancellation",
"label": "echo cancellation"
},
"role": "technique"
}
],
"qualifiers": {
"condition_text": "large-volume feasibility then bidirectional implementation",
"numeric_mentions": [
"448Gb/s"
],
"temporal_mentions": []
},
"relation_type": "HIGH_SPEED_BIDIRECTIONAL_SERDES_CHALLENGES"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| modulation | PAM4 | PAM4 |
| serdes | SerDes | SerDes |
| technique | echo cancellation | 04_knowledge_base/Echo cancellation |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。