SA260324R-0307_r1

SA260324R-0307

① SA Source

• Source: 開啟完整 SA 文章
• Section: STX
• Line hint: 390

Context Before

BF-4 in STX. Source: Nvidia, SemiAnalysis

Evidence

Unlike the BF-4 in the VR NVL72, which consists of a Grace CPU

Context After

and a single CX-9 NIC, the BF-4 in the STX reference design includes one Vera CPU, two CX-9 NICs, and two SOCAMM modules. Each STX box contains two BF-4 units, totaling two Vera CPUs, four CX-9 NICs, and four SOCAMM modules. For the whole STX rack, it has a total of 16 boxes, implying 32 Vera CPUs, 64 CX-9 NICs, and 64 SOCAMMs.

② Atomic Claim

作為對照，VR NVL72 中的 BF-4 包含一顆 Grace CPU……

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/VR NVL72",
        "label": "VR NVL72"
      },
      "role": "system"
    },
    {
      "node": {
        "id": "04_knowledge_base/BlueField-4",
        "label": "BF-4"
      },
      "role": "component"
    },
    {
      "node": {
        "id": "04_knowledge_base/NVIDIA Grace",
        "label": "Grace CPU"
      },
      "role": "cpu"
    }
  ],
  "qualifiers": {
    "condition_text": "extraction fragment continues in next claim",
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "relation_type": "VR_NVL72_BLUEFIELD4_COMPOSITION_FRAGMENT"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
system	VR NVL72	04_knowledge_base/VR NVL72
component	BF-4	BlueField-4
cpu	Grace CPU	04_knowledge_base/NVIDIA Grace

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。