SA260324R-0298_r1

SA260324R-0298

① SA Source

• Source: 開啟完整 SA 文章
• Section: CMX
• Line hint: 376

Context Before

NVIDIA introduced a “new” intermediate storage “tier G3.5” within the inference memory hierarchy at CES in January.

Evidence

Tier G3.5 NVMe sits in between tier G3 DRAM

Context After

and tier G4 shared storage (also NVMe, or SATA/SAS SSD, or HDD). Previously referred to as ICMS (Inference Context Memory Storage) and now branded as the CMX platform, this is just another re-brand of storage servers attached to compute servers via Bluefield NICs. The only difference from NVMe architectures is the swap from Connect-X NICs to Bluefield NICs.

② Atomic Claim

Tier G3.5 NVMe 位在 tier G3 DRAM 與下一層 shared storage 之間……

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/NVMe",
        "label": "NVMe"
      },
      "role": "intermediate_storage"
    },
    {
      "node": {
        "id": "04_knowledge_base/DRAM",
        "label": "DRAM"
      },
      "role": "upper_tier"
    }
  ],
  "qualifiers": {
    "condition_text": "extraction fragment continues with tier G4 shared storage in next claim",
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "relation_type": "MEMORY_HIERARCHY_POSITION"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
intermediate_storage	NVMe	NVMe
upper_tier	DRAM	DRAM

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。