SA260324R-0237
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Oberon and Kyber Updates, Larger World Sizes Introduced, More Networking Updates - Line hint:
292
Context Before
Moving back to the Kyber Rack, each Rubin Ultra logical GPU offers 14.4Tbit/s uni-di of scale-up bandwidth, using an 80DP connector (72 DPs used x 200Gbit/s bi-di channel = 14.4Tbit/s) per GPU for connectivity to the midplane board.
Evidence
Connecting all 144 GPUs in an all-to-all network will require 72 NVLink 7.0 Switch Chips running at 28.8Tbit/s uni-di of aggregate bandwidth each.
Context After
In the Kyber Switch Blade picture below, we can see that there are 2 separate PCBs carrying 3 Switches each. The switch blade should have 6 152DP connectors, 3 connectors serving each midplane board. The picture is a prototype blade using less dense connectors, which is why there are 12 connectors instead of the 6 that we expect in the production version.
② Atomic Claim
要把 144 顆 GPU 以 all-to-all network 互連,需要 72 顆 NVLink 7.0 switch chip,每顆提供 28.8Tbit/s uni-di aggregate bandwidth。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/GPU",
"label": "GPU"
},
"role": "compute_device"
},
{
"node": {
"id": "04_knowledge_base/NVLink",
"label": "NVLink 7.0"
},
"role": "switch_technology"
}
],
"qualifiers": {
"condition_text": "all-to-all network",
"numeric_mentions": [
"144",
"72",
"28.8Tbit/s"
],
"temporal_mentions": []
},
"relation_type": "ALL_TO_ALL_GPU_SWITCH_REQUIREMENT"
}④ Canonical Entity Mapping
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。