SA260324R-0204_r1

SA260324R-0204

① SA Source

• Source: 開啟完整 SA 文章
• Section: Nvidia's CPO Roadmap
• Line hint: 243

Context Before

Nvidia’s approach has been to use copper where they can, and optics where they must. The architecture of NVL1152 in the Feynman generation will follow the same principle. It is clear that the NVL1152 will adopt CPO to connect between racks, but from GPUs to NVLink Switches is currently copper POR. Nvidia is unable to achieve another doubling of electrical lane speed from 224Gbit/s bi-di to 448Gbit/s uni-di means bandwidth isn’t that amazing.

Evidence

While 448G high speed SerDes have big challenges for shoreline, reach, and power versus using a die-to-die connection to an optical engine, the manufacturing challenges, cost, and reliability for Feynman necessitate using copper to the Switch.

Context After

With that said, the NVL1152 SKU is years out – and the roadmap is highly likely to shift. For now, our base case stands at copper being used within each rack and CPO between the racks, but this could easily change.

② Atomic Claim

448G high-speed SerDes 相較 die-to-die 連到 optical engine，在 shoreline、reach 與 power 上有很大挑戰；但考量 Feynman 的製造難度、成本與可靠性，仍需要使用 copper 連到 switch。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/SerDes",
        "label": "SerDes"
      },
      "role": "high_speed_interface"
    },
    {
      "node": {
        "id": "04_knowledge_base/NVIDIA Feynman Architecture",
        "label": "Feynman"
      },
      "role": "generation"
    },
    {
      "node": {
        "id": "04_knowledge_base/Copper",
        "label": "copper"
      },
      "role": "interconnect_material"
    }
  ],
  "qualifiers": {
    "condition_text": "die-to-die 與 optical engine 在此 atomic claim 未 canonical-link；原文列出的考量為 manufacturing challenges、cost、reliability",
    "numeric_mentions": [
      "448G"
    ],
    "temporal_mentions": []
  },
  "relation_type": "REQUIRES_COPPER_TO_SWITCH_DUE_TO_MANUFACTURING_CONSTRAINTS"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
high_speed_interface	SerDes	SerDes
generation	Feynman	04_knowledge_base/NVIDIA Feynman Architecture
interconnect_material	copper	Copper

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。