SA260324R-0201_r1

SA260324R-0201

① SA Source

• Source: 開啟完整 SA 文章
• Section: Nvidia's CPO Roadmap
• Line hint: 241

Context Before

Nvidia’s approach has been to use copper where they can, and optics where they must. The architecture of NVL1152 in the Feynman generation will follow the same principle.

Evidence

It is clear that the NVL1152 will adopt CPO to connect between racks

Context After

, but from GPUs to NVLink Switches is currently copper POR. Nvidia is unable to achieve another doubling of electrical lane speed from 224Gbit/s bi-di to 448Gbit/s uni-di means bandwidth isn’t that amazing.

② Atomic Claim

可以確定 NVL1152 將採用 CPO 進行機櫃間連接。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "additional_nodes": [],
  "frame_type": "RELATION",
  "object": {
    "id": "04_knowledge_base/CPO",
    "label": "CPO"
  },
  "predicate": "USES",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "subject": {
    "id": "04_knowledge_base/NVL1152",
    "label": "NVL1152"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
subject	NVL1152	NVL1152
object	CPO	CPO

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。