SA260324R-0162
① SA Source
- Source: 開啟完整 SA 文章
- Section:
LPU Network - Line hint:
195
Context Before
The LPU network can be divided into the scale-up ‘C2C’ network and scale-out network which interacts with the Nvidia GPUs through Spectrum-X. First let’s discuss the scale-up network which can be divided into 3 portions: intra-node, inter-node/intra-rack, inter-rack.
Evidence
Context After
Note that Nvidia uses the total 112G line rate rather than 100G of effective data rate.
② Atomic Claim
對 rack 內的 C2C,Nvidia 宣布每櫃總 scale-up bandwidth 為 640TB/s;依 256 顆 LPU × 90 lanes × 112Gbps ÷ 8 × 2 directions 計算約為 645TB/s。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "SCALE_UP_BANDWIDTH_PER_RACK",
"context_nodes": [
{
"id": "02_companies/NVDA",
"label": "Nvidia"
},
{
"id": "04_knowledge_base/Groq LPU",
"label": "LPU"
}
],
"entity": {
"id": "04_knowledge_base/Chip-to-Chip Interconnect",
"label": "C2C"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": "rack 內 C2C scale-up bandwidth",
"numeric_mentions": [
"640TB/s",
"256",
"90",
"112Gbps",
"8",
"2",
"645TB/s"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"640TB/s",
"256",
"90",
"112Gbps",
"8",
"2",
"645TB/s"
],
"value_text": "Nvidia 宣布每櫃 640TB/s,依 256 LPU × 90 lanes × 112Gbps ÷ 8 × 2 directions 計算約 645TB/s。"
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | C2C | 04_knowledge_base/Chip-to-Chip Interconnect |
| context_node | Nvidia | NVDA |
| context_node | LPU | 04_knowledge_base/Groq LPU |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。