SA260324R-0155

① SA Source

Context Before

Third, the FPGAs are connected to the backplane to talk to other FPGAs in the node, we believe this is to help manage control flow and timing of all the LPUs. The FPGAs also bring extra system DRAM of up to 256GB each. This pool of memory can be used for KVCache if the user wants the entire decode process served by the LPX.

Evidence

On the front panel there are 8 x OSFP cages for cross-rack C2C

Context After

, while there will be 2 cages (likely QSFP-DD) that goes to the Spectrum-switches that is used to connect the LPUs and the GPUs for the disaggregated decode system. We will share more about this when we describe the network.

② Atomic Claim

前面板配置 8 個 OSFP cages,用於跨機櫃 C2C 連線。

  • Epistemic Mode: ASSERTED
  • Mapping Status: COMPLETE

③ Semantic Frame

{
  "additional_nodes": [],
  "frame_type": "RELATION",
  "object": {
    "id": "04_knowledge_base/Chip-to-Chip Interconnect",
    "label": "C2C"
  },
  "predicate": "CONNECTS_TO",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [
      "8"
    ],
    "temporal_mentions": []
  },
  "subject": {
    "id": "04_knowledge_base/OSFP (Octal Small Form-factor Pluggable)",
    "label": "OSFP"
  }
}

④ Canonical Entity Mapping

⑤ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。