SA260324R-0075_r1

SA260324R-0075

① SA Source

• Source: 開啟完整 SA 文章
• Section: SRAM and Memory Hierarchy
• Line hint: 85

Context Before

LPU 3’s near reticle size die layout is very similar to LPU 1. a significant amount of area taken is up by the 500MB of on-chip SRAM, with a very small amount of area dedicated to MatMul cores that offer 1.2 PFLOPs of FP8 compute – a fraction of compute compared to Nvidia GPUs.

Evidence

This compares to LPU 1 with 230MB of SRAM and 750 TFLOPs of INT8

Context After

, with the performance increase mostly driven by node migration from GF16 to SF4. As a single monolithic die, advanced packaging isn’t required.

② Atomic Claim

相比之下，LPU 1 配備 230MB SRAM，並提供 750 TFLOPs 的 INT8 運算能力。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "comparison_expression": "相比之下，LPU 1 配備 230MB SRAM，並提供 750 TFLOPs 的 INT8 運算能力。",
  "entities": [
    {
      "id": "04_knowledge_base/Groq LPU",
      "label": "LPU"
    },
    {
      "id": "04_knowledge_base/SRAM",
      "label": "SRAM"
    },
    {
      "id": "04_knowledge_base/TFLOPS",
      "label": "TFLOPs"
    },
    {
      "id": "04_knowledge_base/INT8",
      "label": "INT8"
    }
  ],
  "frame_type": "COMPARISON",
  "metric": "COMPUTE_PERFORMANCE",
  "operator": "COMPARES_WITH",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [
      "1",
      "230MB",
      "750 TFLOPs"
    ],
    "temporal_mentions": []
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	LPU	04_knowledge_base/Groq LPU
entity	SRAM	SRAM
entity	TFLOPs	TFLOPS
entity	INT8	INT8

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。