SA260324R-0042_r1

SA260324R-0042

① SA Source

• Source: 開啟完整 SA 文章
• Section: LPU chip
• Line hint: 53

Context Before

LPU gen 1 was designed on a legacy Global Foundries 14nm process, with Marvell responsible for the chip’s physical design. This was a much more mature node compared to peers when it taped out in 2020, with the incumbent AI chip platforms mostly on TSMC’s N7 platform. This made sense for an early product focused on proving out Groq’s architecture and bringing its inference-centric design to market.

Evidence

The 14nm node was mature, relatively well understood, and suitable for an initial chip where architectural differentiation mattered more than pushing its silicon to the leading edge.

Context After

One of the selling points is that the chip can be manufactured and packaged entirely in the United States compared to their competitors being heavily reliant on the Asia semiconductor supply chain: logic and packaging in Taiwan, with HBM from Korea.

② Atomic Claim

14nm 製程已相當成熟、業界也較熟悉，因此適合初代晶片；對這類產品而言，架構差異化比把 silicon 推到最先進節點更重要。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "MATURITY_AND_INITIAL_CHIP_SUITABILITY",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/14nm",
    "label": "14nm"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": "architectural differentiation mattered more than leading-edge silicon",
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "成熟、相對容易掌握，適合架構差異化優先於 leading-edge silicon 的初代晶片"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	14nm	14nm

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。