SA260324R-0030
① SA Source
- Source: 開啟完整 SA 文章
- Section:
LPU chip - Line hint:
43
Context Before
Concretely, LPU architecture has VXM slices for vector operations, MEM slices for loading/storing data, SXM slices for tensor shape manipulation, and MXM slices for performing matrix multiplication.
Evidence
Spatially, the slices are laid out horizontally, allowing the data to stream horizontally.
Context After
Within a slice, instructions are pumped vertically across units. Conceptually, LPU resembles a systolic array that pumps instructions vertically and data horizontally.
② Atomic Claim
在空間配置上，這些 slices 以水平方向排列，使資料能沿水平方向串流。
- Epistemic Mode:
ASSERTED - Mapping Status:
PARTIAL
③ Semantic Frame
{
"frame_type": "CLAIM_ONLY",
"qualifiers": {
"condition_text": null,
"numeric_mentions": [],
"temporal_mentions": []
},
"reason": "本 claim 以 these slices 承接上一條 LPU slice 架構；為避免把上下文補入句內，保留為 claim-only。",
"statement": "在空間配置上，這些 slices 以水平方向排列，使資料能沿水平方向串流。"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| — | — | — |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。