NIEK2-0138

① SA Source

Context Before

For LPUs, deploying a draft model or MTP layers is quite different from applying AFD. FFNs are stateless, while draft models and MTP layers require dynamic KV cache loading. Each FFN is around hundreds of megabytes, whereas draft models and MTP layers take up tens of gigabytes. To support this memory usage, LPUs can access up to 256 GB of DDR5 per Fabric Expansion Logic FPGAs on the LPX compute tray.

LPX Rack System

Evidence

We believe that this server configuration is not the version that will be shipped in 3Q, with Nvidia implementing changes

Context After

image

Source: SemiAnalysis Accelerator Model

② Atomic Claim

SemiAnalysis 認為這個伺服器配置並不是第三季實際出貨版本,Nvidia 還會進一步修改。

  • Epistemic Mode: INFERRED
  • Mapping Status: PARTIAL

③ Semantic Frame

{
  "attribute": "VOLUME",
  "context_nodes": [],
  "entity": {
    "id": "02_companies/NVDA",
    "label": "Nvidia"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "SemiAnalysis 認為這個伺服器配置並不是第三季實際出貨版本,Nvidia 還會進一步修改。"
  }
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
entityNvidiaNVDA

⑤ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。