NIEK2-0282

① SA Source

Context Before

image

Source: SemiAnalysis

Evidence

Each Vera ETL rack consists of 32 compute trays, 16 above and 16 below, arranged symmetrically around four 1U MGX ETL switch trays (based on Spectrum-6) in the middle

Context After

Networking within the rack uses a Spectrum-X multiplane topology, distributing 200 Gb/s lanes across the four switches to achieve full all-to-all connectivity while maintaining a single network tier. With each compute tray housing 8 Vera CPUs, the result is 256 CPUs per rack, all interconnected over Ethernet through a single, flat network.

image

② Atomic Claim

關於 Feynman:其中 16 個 compute trays 位於上半部。

  • Epistemic Mode: ASSERTED
  • Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "COMPUTE_PERFORMANCE",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/NVIDIA Feynman Architecture",
    "label": "Feynman"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [
      "16"
    ],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [
      "16"
    ],
    "value_text": "關於 Feynman:其中 16 個 compute trays 位於上半部。"
  }
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
entityFeynman04_knowledge_base/NVIDIA Feynman Architecture

⑤ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。