SA260324R-0032
① SA Source
- Source: 開啟完整 SA 文章
- Section:
LPU chip - Line hint:
35
Context Before
LPU chip
Groq’s first and only publicly announced LPU architecture was detailed in their ISCA 2020 paper. Unlike typical hardware architectures connecting many general-purpose cores, Groq re-organized the architecture into groups of single-purpose units connecting to other groups of different purposes, and they named the groups “slices.” Between functional units are streaming registers, scratchpad SRAM for functional units to pass data to each other. Groq opted for single-level scratchpad SRAM instead of multi-level memory hierarchy to make the hardware execution deterministic.
Evidence
Concretely, LPU architecture has VXM slices for vector operations, MEM slices for loading/storing data, SXM slices for tensor shape manipulation, and MXM slices for performing matrix multiplication. Spatially, the slices are laid out horizontally, allowing the data to stream horizontally. Within a slice, instructions are pumped vertically across units. Conceptually, LPU resembles a systolic array that pumps instructions vertically and data horizontally.
Context After
Source: Groq, SemiAnalysis
② Atomic Claim
概念上，LPU 類似 systolic array：instructions 沿垂直方向傳送，而資料沿水平方向流動。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"additional_nodes": [],
"frame_type": "RELATION",
"object": {
"id": "04_knowledge_base/Systolic Array",
"label": "systolic array"
},
"predicate": "RESEMBLES",
"qualifiers": {
"condition_text": "instructions vertically；data horizontally",
"numeric_mentions": [],
"temporal_mentions": []
},
"subject": {
"id": "04_knowledge_base/Groq LPU",
"label": "LPU"
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| subject | LPU | 04_knowledge_base/Groq LPU |
| object | systolic array | 04_knowledge_base/Systolic Array |
⑤ V2 Draft（需要修正時直接編輯）
Inline repair
只編輯以下三個 Draft 區塊。完成後將
review_action設為REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。
V2 Atomic Claim Draft
概念上，LPU 類似 systolic array：instructions 沿垂直方向傳送，而資料沿水平方向流動。
V2 Semantic Frame Draft
{
"additional_nodes": [],
"frame_type": "RELATION",
"object": {
"id": "04_knowledge_base/Systolic Array",
"label": "systolic array"
},
"predicate": "RESEMBLES",
"qualifiers": {
"condition_text": "instructions vertically；data horizontally",
"numeric_mentions": [],
"temporal_mentions": []
},
"subject": {
"id": "04_knowledge_base/Groq LPU",
"label": "LPU"
}
}V2 Revision Metadata Draft
{
"epistemic_mode": "ASSERTED",
"mapping_status": "COMPLETE"
}⑥ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。