clm_8b466417083f4bbfa1491af5e53fb8fe_r1

SA-COV-SA-G3-LAT

回到這篇 SA Coverage

① SA Source

• Source: 開啟完整 SA 文章
• Section: STX
• Line hint: 371

Context Before

KV cache grows linearly with input sequence length and number of users and is the primary tradeoff when it comes to prefill performance (time to first token). At scale, on-device HBM does not have enough capacity. Host DRAM extends beyond HBM capacity with an additional tier of cache, but also hits limits on total amount per node, memory bandwidth, and network bandwidth. Enter NVMe storage for additional KVcache offload.

NVIDIA introduced a “new” intermediate storage “tier G3.5” within the inference memory hierarchy at CES in January. Tier G3.5 NVMe sits in between tier G3 DRAM and tier G4 shared storage (also NVMe, or SATA/SAS SSD, or HDD). Previously referred to as ICMS (Inference Context Memory Storage) and now branded as the CMX platform, this is just another re-brand of storage servers attached to compute servers via Bluefield NICs. The only difference from NVMe architectures is the swap from Connect-X NICs to Bluefield NICs.

Evidence

Context After

Source: Original NVIDIA ICMS blog in January, 2026 – updated and re-released on March 16, 2026 https://developer.[[02_companies/NVDA|nvidia]].com/blog/introducing-[[02_companies/NVDA|nvidia]]-[[04_knowledge_base/BlueField-4|bluefield-4]]-powered-inference-context-memory-storage-platform-for-the-next-frontier-of-ai/ ↗

STX

② Atomic Claim

The cited Nvidia hierarchy illustration places G3 local SSD/rack-local warm KV reuse in the microsecond range.

• Epistemic Mode: ATTRIBUTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "CONTEXT_HIERARCHY_G3_LATENCY",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/NVIDIA STX Reference Storage Rack",
    "label": "NVIDIA STX Reference Storage Rack"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "microseconds"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	NVIDIA STX Reference Storage Rack	04_knowledge_base/NVIDIA STX Reference Storage Rack

⑤ V2 Draft（需要修正時直接編輯）

Inline repair

只編輯以下三個 Draft 區塊。完成後將 review_action 設為 REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。

V2 Atomic Claim Draft

The cited Nvidia hierarchy illustration places G3 local SSD/rack-local warm KV reuse in the microsecond range.

V2 Semantic Frame Draft

{
  "attribute": "CONTEXT_HIERARCHY_G3_LATENCY",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/NVIDIA STX Reference Storage Rack",
    "label": "NVIDIA STX Reference Storage Rack"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "microseconds"
  }
}

V2 Revision Metadata Draft

{
  "epistemic_mode": "ATTRIBUTED",
  "mapping_status": "COMPLETE"
}

⑥ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。