SA260324R-0140::SPLIT02
① SA Source
- Source: 開啟完整 SA 文章
- Section:
LPX Compute Tray - Line hint:
155
Context Before
Source: SemiAnalysis Accelerator Model ↗
LPX Compute Tray
Evidence
Each LPX compute tray or node has 16 LPUs with 2 Altera FPGAs, 1 Intel Granite Rapids host CPU and 1 BlueField-4 front-end module. As with other Nvidia systems, hyperscalers customers can and will use their own Front-end NIC of choice rather than paying for Nvidia’s BlueField.
Context After
Source: SemiAnalysis Accelerator Model ↗
② Atomic Claim
每個 LPX compute tray／node 配置 2 顆 Altera FPGA。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/Groq LPX",
"label": "LPX"
},
"role": "rack_system"
},
{
"node": {
"id": "04_knowledge_base/Compute Tray",
"label": "compute tray"
},
"role": "tray"
},
{
"node": {
"id": "02_companies/Altera",
"label": "Altera"
},
"role": "vendor"
},
{
"node": {
"id": "04_knowledge_base/FPGA",
"label": "FPGA"
},
"role": "component"
}
],
"qualifiers": {
"condition_text": "per LPX compute tray/node",
"numeric_mentions": [
"2"
],
"temporal_mentions": []
},
"relation_type": "HAS_COMPONENT_COUNT"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| rack_system | LPX | 04_knowledge_base/Groq LPX |
| tray | compute tray | 04_knowledge_base/Compute Tray |
| vendor | Altera | Altera |
| component | FPGA | FPGA |
⑤ V2 Draft（需要修正時直接編輯）
Inline repair
只編輯以下三個 Draft 區塊。完成後將
review_action設為REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。
V2 Atomic Claim Draft
每個 LPX compute tray／node 配置 2 顆 Altera FPGA。
V2 Semantic Frame Draft
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/Groq LPX",
"label": "LPX"
},
"role": "rack_system"
},
{
"node": {
"id": "04_knowledge_base/Compute Tray",
"label": "compute tray"
},
"role": "tray"
},
{
"node": {
"id": "02_companies/Altera",
"label": "Altera"
},
"role": "vendor"
},
{
"node": {
"id": "04_knowledge_base/FPGA",
"label": "FPGA"
},
"role": "component"
}
],
"qualifiers": {
"condition_text": "per LPX compute tray/node",
"numeric_mentions": [
"2"
],
"temporal_mentions": []
},
"relation_type": "HAS_COMPONENT_COUNT"
}V2 Revision Metadata Draft
{
"epistemic_mode": "ASSERTED",
"mapping_status": "COMPLETE"
}⑥ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。