clm_3cc5453f1ad84dc8b6ea58063ed3657e_r1

NIEK2-0173

① SA Source

• Source: 開啟完整 SA 文章
• Section: Inter-node/Intra-rack
• Line hint: 195

Context Before

Source: SemiAnalysis Networking Model ↗

Evidence

In addition, each FPGA also connects to an FPGA in every other node at either 25G or 50G per link for 15x25G/50G

Context After

Inter-rack

② Atomic Claim

此外，每顆 FPGA 也會與其他每個 node 中的一顆 FPGA 連接，每條 link 為 25G 或 50G，合計 15×25G/50G。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "comparison_expression": "此外，每顆 FPGA 也會與其他每個 node 中的一顆 FPGA 連接，每條 link 為 25G 或 50G，合計 15×25G/50G。",
  "entities": [
    {
      "id": "04_knowledge_base/FPGA",
      "label": "FPGA"
    }
  ],
  "frame_type": "COMPARISON",
  "metric": "COUNT",
  "operator": "MULTIPLE_OF",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [
      "25",
      "50",
      "15×"
    ],
    "temporal_mentions": []
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
comparison_entity_0	FPGA	FPGA

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。