NIEK2-0308
① SA Source
- Source: 開啟完整 SA 文章
- Section:
STX - Line hint:
383
Context Before

BF-4 in STX. Source: Nvidia, SemiAnalysis
Evidence
Context After

STX Rack (left). Source: Nvidia, SemiAnalysis
② Atomic Claim
不同於 VR NVL72 中由一顆 Grace CPU 與一張 CX-9 NIC 組成的 BF-4,STX reference design 中的 BF-4 會包含一顆 Vera CPU、兩張 CX-9 NICs 與兩個 SOCAMM modules。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/VR NVL72",
"label": "VR NVL72"
},
"role": "system_or_subject"
},
{
"node": {
"id": "04_knowledge_base/NVIDIA Grace",
"label": "Grace CPU"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/NIC",
"label": "NIC"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/NVIDIA STX Reference Storage Rack",
"label": "STX"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/Reference Design",
"label": "reference design"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/NVIDIA Vera CPU",
"label": "Vera CPU"
},
"role": "component"
},
{
"node": {
"id": "04_knowledge_base/SOCAMM",
"label": "SOCAMM"
},
"role": "component"
}
],
"qualifiers": {
"condition_text": null,
"numeric_mentions": [
"9",
"4"
],
"temporal_mentions": []
},
"relation_type": "HAS_COMPONENT"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| system_or_subject | VR NVL72 | 04_knowledge_base/VR NVL72 |
| component | Grace CPU | 04_knowledge_base/NVIDIA Grace |
| component | NIC | NIC |
| component | STX | 04_knowledge_base/NVIDIA STX Reference Storage Rack |
| component | reference design | 04_knowledge_base/Reference Design |
| component | Vera CPU | 04_knowledge_base/NVIDIA Vera CPU |
| component | SOCAMM | SOCAMM |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。