clm_1fef6a1d727e4958888c334a00fa7d56_r2

SA260324R-0244

回到這篇 SA Coverage

① SA Source

• Source: 開啟完整 SA 文章
• Section: Oberon and Kyber Updates, Larger World Sizes Introduced, More Networking Updates
• Line hint: 303

Context Before

Source: SemiAnalysis Networking Model ↗

Evidence

Each NVLink Switch Chip connects via flyover cables to the connector (144 DPs used x 200 Gbit/s bi-di channel = 28.8Tbit/s) connectors at the edge of the switch blade, and these connectors plug into the midplane board. Nvidia is looking into using co-packaged Copper to reduce loss further, in case NPC doesn’t work. As far as we know the Nvidia is telling supply chain to go for fully co-packaged copper.

Context After

Rubin Ultra NVL288

Though not officially discussed by Nvidia at GTC 2026, an NVL288 concept has been explored within the supply chain. This would entail two NVL144 Kyber racks placed adjacent to each other, with a rack-to-rack copper backplane used to connect the two racks. One possibility is that all 288 GPUs are connected all to all, but this would require higher radix switches than the current NVLink 7 switches which only offer a maximum radix of 144 ports of 200G.

② Atomic Claim

In the March 2026 Kyber prototype/design discussion: 每顆 NVLink Switch chip 透過 flyover cable 連到 switch blade 邊緣的 connector（使用 144 DPs × 200Gbit/s bi-di＝28.8Tbit/s），再由 connector 插入 midplane board。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/NVSwitch",
        "label": "NVLink Switch"
      },
      "role": "switch"
    },
    {
      "node": {
        "id": "04_knowledge_base/Flyover cable",
        "label": "flyover cable"
      },
      "role": "cable"
    },
    {
      "node": {
        "id": "04_knowledge_base/Midplane",
        "label": "midplane"
      },
      "role": "midplane"
    }
  ],
  "qualifiers": {
    "condition_text": "connector 與 switch blade 沒有 canonical entity",
    "numeric_mentions": [
      "144",
      "200Gbit/s",
      "28.8Tbit/s"
    ],
    "temporal_mentions": []
  },
  "relation_type": "NVSWITCH_TO_MIDPLANE_VIA_FLYOVER"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
switch	NVLink Switch	NVSwitch
cable	flyover cable	04_knowledge_base/Flyover cable
midplane	midplane	Midplane

⑤ V2 Draft（需要修正時直接編輯）

Inline repair

只編輯以下三個 Draft 區塊。完成後將 review_action 設為 REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。

V2 Atomic Claim Draft

In the March 2026 Kyber prototype/design discussion: 每顆 NVLink Switch chip 透過 flyover cable 連到 switch blade 邊緣的 connector（使用 144 DPs × 200Gbit/s bi-di＝28.8Tbit/s），再由 connector 插入 midplane board。

V2 Semantic Frame Draft

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/NVSwitch",
        "label": "NVLink Switch"
      },
      "role": "switch"
    },
    {
      "node": {
        "id": "04_knowledge_base/Flyover cable",
        "label": "flyover cable"
      },
      "role": "cable"
    },
    {
      "node": {
        "id": "04_knowledge_base/Midplane",
        "label": "midplane"
      },
      "role": "midplane"
    }
  ],
  "qualifiers": {
    "condition_text": "connector 與 switch blade 沒有 canonical entity",
    "numeric_mentions": [
      "144",
      "200Gbit/s",
      "28.8Tbit/s"
    ],
    "temporal_mentions": []
  },
  "relation_type": "NVSWITCH_TO_MIDPLANE_VIA_FLYOVER"
}

V2 Revision Metadata Draft

{
  "epistemic_mode": "ASSERTED",
  "mapping_status": "PARTIAL"
}

⑥ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。