SA260324R-0162::SPLIT02
① SA Source
- Source: 開啟完整 SA 文章
- Section:
LPU Network - Line hint:
177
Context Before
On the front panel there are 8 x OSFP cages for cross-rack C2C, while there will be 2 cages (likely QSFP-DD) that goes to the Spectrum-switches that is used to connect the LPUs and the GPUs for the disaggregated decode system. We will share more about this when we describe the network.
LPU Network
Evidence
The LPU network can be divided into the scale-up ‘C2C’ network and scale-out network which interacts with the Nvidia GPUs through Spectrum-X. First let’s discuss the scale-up network which can be divided into 3 portions: intra-node, inter-node/intra-rack, inter-rack. For C2C within the rack Nvidia announced a total of 640TB/s of scale up bandwidth per rack which comes from 256 LPUs x 90 lanes x 112Gbps/8 x 2 directions = 645TB/s. Note that Nvidia uses the total 112G line rate rather than 100G of effective data rate.
Context After
Intra-Tray Topology
② Atomic Claim
依 256 顆 LPU × 90 lanes × 112Gbps ÷ 8 × 2 directions 計算，rack 內 C2C 的 scale-up bandwidth 約為 645TB/s。
- Epistemic Mode:
ESTIMATED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "ARITHMETIC_DERIVED_SCALE_UP_BANDWIDTH_PER_RACK",
"context_nodes": [
{
"id": "04_knowledge_base/Groq LPU",
"label": "LPU"
}
],
"entity": {
"id": "04_knowledge_base/Chip-to-Chip Interconnect",
"label": "C2C"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": "arithmetic-derived from the stated rack configuration",
"numeric_mentions": [
"256",
"90",
"112Gbps",
"8",
"2",
"645TB/s"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"256",
"90",
"112Gbps",
"8",
"2",
"645TB/s"
],
"value_text": "256 LPU × 90 lanes × 112Gbps ÷ 8 × 2 directions ≈ 645TB/s."
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | C2C | 04_knowledge_base/Chip-to-Chip Interconnect |
| context_0 | LPU | 04_knowledge_base/Groq LPU |
⑤ V2 Draft（需要修正時直接編輯）
Inline repair
只編輯以下三個 Draft 區塊。完成後將
review_action設為REQUEST_REPAIR，再手動執行 Repair Preview。
執行腳本前，Draft 不會寫入 Claim Store 或 Graph。
V2 Atomic Claim Draft
依 256 顆 LPU × 90 lanes × 112Gbps ÷ 8 × 2 directions 計算，rack 內 C2C 的 scale-up bandwidth 約為 645TB/s。
V2 Semantic Frame Draft
{
"attribute": "ARITHMETIC_DERIVED_SCALE_UP_BANDWIDTH_PER_RACK",
"context_nodes": [
{
"id": "04_knowledge_base/Groq LPU",
"label": "LPU"
}
],
"entity": {
"id": "04_knowledge_base/Chip-to-Chip Interconnect",
"label": "C2C"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": "arithmetic-derived from the stated rack configuration",
"numeric_mentions": [
"256",
"90",
"112Gbps",
"8",
"2",
"645TB/s"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"256",
"90",
"112Gbps",
"8",
"2",
"645TB/s"
],
"value_text": "256 LPU × 90 lanes × 112Gbps ÷ 8 × 2 directions ≈ 645TB/s."
}
}V2 Revision Metadata Draft
{
"epistemic_mode": "ESTIMATED",
"mapping_status": "COMPLETE"
}⑥ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。