VR2R-0726_r1

VR2R-0726

① SA Source

• Source: 開啟完整 SA 文章
• Section: VR NVL72 TCO: BoM and Power Budget Analysis
• Line hint: 635

Context Before

As always, one caveat is that this comparison is done based on a marketed dense PFLOP basis.

Evidence

Effective dense PFLOP (i.e. the real world chip throughput) can differ based on Model Flops Utilization % (MFU)

Context After

, and in general we have seen NVIDIA chip operate at a higher MFU % vs AMD chips, suggesting that performance per TCO based on effective dense PFLOPs could be better for NVIDIA systems vs AMD—however, MFU is dependent on actual workloads with no one-size-fits-all MFU % that is consistently applicable to either systems.

② Atomic Claim

Effective dense PFLOP，也就是真實世界 chip throughput，會隨 Model Flops Utilization（MFU）而不同。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "attribute": "COMPUTE_PERFORMANCE",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/Model FLOPS Utilization",
    "label": "Model Flops Utilization"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": null,
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [],
    "value_text": "Effective dense PFLOP，也就是真實世界 chip throughput，會隨 Model Flops Utilization（MFU）而不同。"
  }
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
entity	Model Flops Utilization	04_knowledge_base/Model FLOPS Utilization

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。