VR2R-0706_r1

VR2R-0706

① SA Source

• Source: 開啟完整 SA 文章
• Section: VR NVL72 TCO: BoM and Power Budget Analysis
• Line hint: 611

Context Before

For AMD’s Helios rack scale system, AMD sells the GPU/board and does procure the LPDDR5 memory, but it does not procure DDR5 DRAM for rack compute trays; rack assemblers/ODMs source and integrate DDR5 memory. This leaves buyers of AMD’s racks more exposed because AMD is only able to potentially “hedge” the LPDDR5 portion via long-term contracts leaving the DDR5 portion completely exposed. Having double the DRAM content also nearly doubles the overall exposure.

Evidence

Helios memory costs are more likely to be passed through or re-priced by assemblers and therefore exhibit greater hikes in a memory upcycle.

Context After

Therefore, we model lower memory price hikes for VR and GB compared to MI4XX below. Our MI400 rack assumptions reflect $8.70/GB[[04_{k}nowledg{e}_{b}ase/LPDDR|LPDDR]]pricingfor[[02_{c}ompanies/AMD|AMD]]versus$6.77/GB for Nvidia, embedding volume discount structures vs the market contract price of $10.63/GB but reflecting the slack of volume economics vs NVIDIA.

② Atomic Claim

在 memory upcycle 中，Helios 的 memory costs 更可能被 assemblers 轉嫁或重新定價，因此價格漲幅可能更大。

• Epistemic Mode: EXPECTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "CLAIM_ONLY",
  "qualifiers": {
    "condition_text": "memory upcycle",
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "reason": "HELIOS_AND_ASSEMBLERS_ARE_PLAIN_TEXT",
  "statement": "Helios memory costs are more likely to be passed through or repriced by assemblers and therefore rise more in a memory upcycle."
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
—	—	—

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。