VR2R-0605_r1

VR2R-0605

① SA Source

• Source: 開啟完整 SA 文章
• Section: Connecting GPUs in the Scale-Out InfiniBand Network
• Line hint: 510

Context Before

Aside from the X800-Q3400 air-cooled switch, NVIDIA will also offer a CPO version, the X800-Q3450, containing the same 144 ports of 800G. Each switch box consists of four 28.8T Quantum-3 Switch ASICs for a total of 115.2T per box switching capacity.

Evidence

When used in conjunction with the VR NVL72 servers, the signal from the NIC at the leaf layer is split four ways—200G each way—to each switch ASIC within the box.

Context After

Such a configuration bears logical equivalence to a 4-plane network architecture.

② Atomic Claim

搭配 VR NVL72 servers 時，leaf layer 的 NIC signal 會分成 4 路，每路 200G，分別送到 box 內各顆 switch ASIC。

• Epistemic Mode: ASSERTED
• Mapping Status: COMPLETE

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/VR NVL72",
        "label": "VR NVL72"
      },
      "role": "platform"
    },
    {
      "node": {
        "id": "04_knowledge_base/NIC",
        "label": "NIC"
      },
      "role": "network_interface"
    },
    {
      "node": {
        "id": "04_knowledge_base/ASIC",
        "label": "ASIC"
      },
      "role": "switch_silicon"
    }
  ],
  "qualifiers": {
    "condition_text": "leaf layer",
    "numeric_mentions": [
      "4",
      "200G"
    ],
    "temporal_mentions": []
  },
  "relation_type": "LEAF_NIC_SIGNAL_SPLITS_FOUR_WAYS_TO_SWITCH_ASICS"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
platform	VR NVL72	04_knowledge_base/VR NVL72
network_interface	NIC	NIC
switch_silicon	ASIC	ASIC

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。