VR2R-0567_r1

VR2R-0567

① SA Source

• Source: 開啟完整 SA 文章
• Section: Scale-Up Network - NVLink 6
• Line hint: 474

Context Before

Zooming out, backplane copper cables are used to connect NVLink Switch trays to the GPU trays for the VR NVL72 system. Although the bandwidth doubles, with bi-directional SerDes, the number of cables required does not change from the GB300 backplane generation to the Vera Rubin NVL72 backplane generation. The number of connectors and the number of DPs per connector also does not change from Grace Blackwell NVL72 to VR NVL72.

Evidence

While the VR NVL72 system features GPUs

Context After

and scale-up switches that are connected by copper cables, the VR HGX system features servers consisting of eight Rubin GPUs and four NVLink Switch chips. The second meaningful difference between the NVL72 and HGX deployments is that the former has a scale-out bandwidth of 1.6T per GPU while the latter only has a scale-out bandwidth of 800G per GPU.

② Atomic Claim

雖然 VR NVL72 system 配置 GPUs……

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/VR NVL72",
        "label": "VR NVL72"
      },
      "role": "platform"
    },
    {
      "node": {
        "id": "04_knowledge_base/GPU",
        "label": "GPU"
      },
      "role": "compute"
    }
  ],
  "qualifiers": {
    "condition_text": "extraction fragment; continues in VR2R-0568",
    "numeric_mentions": [],
    "temporal_mentions": []
  },
  "relation_type": "VR_NVL72_FEATURES_GPUS_FRAGMENT"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
platform	VR NVL72	04_knowledge_base/VR NVL72
compute	GPU	GPU

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。