VR2R-0546
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Scale-Up Network - NVLink 6 - Line hint:
460
Context Before
Although the NVLink 6 Switch used in the VR NVL72 system delivers the same per switch 28.8T aggregate bandwidth as NVLink 5 Switch, the SerDes speed on the NVLink 6 Switch is double the SerDes speed of NVLink 5 Switch but with the same number of DPs. As such, in order to deliver double the aggregate scale-up bandwidth required for NVLink 6, Vera Rubin NVL72 racks will contain double the number of NVLink Switches as compared to GB200 racks.
Evidence
Context After
Each VR NVL72 Switch tray contains four NVLink 6 Switch ASICs and one system management module. The design of the Rubin NVLink 6 Switch tray is also simpler and relatively seamless compared to the first Oberon NVLink 5 Switch released for GB200 because Rubin NVLink 6 Switch trays will not use flyover cables. As such, all NVLink signals will run over the PCB.
② Atomic Claim
這代表每個 tray 配置 4 顆 NVLink Switch chips、共有 9 個 switch trays;因此每個 rack 合計 36 顆 NVLink Switch chips。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"attribute": "SWITCH_CHIP_COUNT_PER_RACK",
"context_nodes": [],
"entity": {
"id": "04_knowledge_base/NVLink",
"label": "NVLink"
},
"frame_type": "ATTRIBUTE",
"qualifiers": {
"condition_text": "VR NVL72 rack context from preceding claim",
"numeric_mentions": [
"4",
"9",
"36"
],
"temporal_mentions": []
},
"value": {
"numeric_mentions": [
"4",
"9",
"36"
],
"value_text": "4 NVLink Switch chips per tray across 9 switch trays, for 36 Switch chips per rack."
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | NVLink | NVLink |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。