VR2R-0544
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Scale-Up Network - NVLink 6 - Line hint:
458
Context Before
NVIDIA’s GB200 scale-up architecture consists of 18 NVLink 5 Switch chips in a single rack for the NVL72 system.
Evidence
Context After
As such, in order to deliver double the aggregate scale-up bandwidth required for NVLink 6, Vera Rubin NVL72 racks will contain double the number of NVLink Switches as compared to GB200 racks.
② Atomic Claim
VR NVL72 使用的 NVLink 6 Switch,每顆 switch 的 aggregate bandwidth 與 NVLink 5 Switch 相同,都是 28.8T;但 NVLink 6 Switch 的 SerDes speed 是 NVLink 5 的 2 倍,同時 DP 數量相同。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"comparison_expression": "NVLink 6 and NVLink 5 switches each provide 28.8T aggregate bandwidth, while NVLink 6 SerDes speed is 2x with the same number of DPs.",
"entities": [
{
"id": "04_knowledge_base/NVLink",
"label": "NVLink 6"
},
{
"id": "04_knowledge_base/NVLink5",
"label": "NVLink 5"
},
{
"id": "04_knowledge_base/SerDes",
"label": "SerDes"
},
{
"id": "04_knowledge_base/VR NVL72",
"label": "VR NVL72"
}
],
"frame_type": "COMPARISON",
"metric": "SWITCH_BANDWIDTH_AND_SERDES_SPEED",
"operator": "MIXED_EQUAL_AND_MULTIPLE",
"qualifiers": {
"condition_text": "per-switch comparison",
"numeric_mentions": [
"28.8T",
"2x"
],
"temporal_mentions": []
}
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| entity | NVLink 6 | NVLink |
| entity | NVLink 5 | NVLink5 |
| entity | SerDes | SerDes |
| entity | VR NVL72 | 04_knowledge_base/VR NVL72 |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。