VR2R-0543
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Scale-Up Network - NVLink 6 - Line hint:
456
Context Before
The bidirectional SerDes technology employed on the copper backplane is used for NVIDIA’s scale-up network. For Vera Rubin NVL72, the scale-up network continues to be rail-optimized with all-to-all connectivity between each GPU and switch ASIC in the scale-up domain.
Evidence
Context After
Although the NVLink 6 Switch used in the VR NVL72 system delivers the same per switch 28.8T aggregate bandwidth as NVLink 5 Switch, the SerDes speed on the NVLink 6 Switch is double the SerDes speed of NVLink 5 Switch but with the same number of DPs. As such, in order to deliver double the aggregate scale-up bandwidth required for NVLink 6, Vera Rubin NVL72 racks will contain double the number of NVLink Switches as compared to GB200 racks.
② Atomic Claim
NVIDIA 的 GB200 scale-up architecture,在單一 NVL72 rack 中包含 18 顆 NVLink 5 Switch chips。
- Epistemic Mode:
ASSERTED - Mapping Status:
COMPLETE
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "02_companies/NVDA",
"label": "NVIDIA"
},
"role": "vendor"
},
{
"node": {
"id": "04_knowledge_base/GB200",
"label": "GB200"
},
"role": "platform"
},
{
"node": {
"id": "04_knowledge_base/NVLink5",
"label": "NVLink 5"
},
"role": "switch_interconnect"
}
],
"qualifiers": {
"condition_text": "single NVL72 rack",
"numeric_mentions": [
"18",
"1"
],
"temporal_mentions": []
},
"relation_type": "GB200_NVL72_RACK_HAS_NVLINK5_SWITCH_CHIPS"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| vendor | NVIDIA | NVDA |
| platform | GB200 | GB200 |
| switch_interconnect | NVLink 5 | NVLink5 |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。