VR2R-0300
① SA Source
- Source: 開啟完整 SA 文章
- Section:
PCB vs Flyover Cables - Line hint:
270
Context Before
First, we must understand why high-speed signals perform worse on PCB versus flyover cables. As SerDes rates increase, high-speed channels become increasingly constrained by insertion loss introduced by PCB traces, vias, dielectric materials and conductor roughness.
Evidence
Insertion loss is defined as the signal power that is lost as a signal is traveling through an interconnect channel.
Context After
The three main mechanisms contributing to insertion loss in a PCB channel are conductor loss from skin effect and copper surface roughness, dielectric loss from laminate absorption, and geometry loss from discontinuities such as vias and layer changes.
② Atomic Claim
Insertion loss 定義為 signal 通過 interconnect channel 時損失的 signal power。
- Epistemic Mode:
ASSERTED - Mapping Status:
PARTIAL
③ Semantic Frame
{
"frame_type": "CLAIM_ONLY",
"qualifiers": {
"condition_text": "definition claim",
"numeric_mentions": [],
"temporal_mentions": []
},
"reason": "INSERTION_LOSS_NOT_CANONICALIZED_IN_SOURCE_CLAIM",
"statement": "insertion loss is the signal power lost while a signal travels through an interconnect channel."
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| — | — | — |
⑤ Human Review
請在 Properties 逐項確認：
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。