VR2R-0265
① SA Source
- Source: 開啟完整 SA 文章
- Section:
Compute Tray Topology - Line hint:
230
Context Before
Essentially, this means ConnectX-8 has two hosts, Grace CPU and B300 GPU. This improves latency in the backend network. However, for VR NVL72, the direct connection between Rubin GPU and ConnectX-9 is reverted back to the same design as GB200, as Rubin does not have PCIe bandwidth for two ConnectX-9.
Evidence
Rubin connects to Vera via C2C link, then Vera will connect to ConnectX-9 via PCIe6 lanes.
Context After
Secondly, the local NVMe storage for Rubin has been moved to a different location from that of NVMe storage in Grace Blackwell. Previously, local NVMe storage was managed by BlueField-3. For VR NVL72, the local NVMe storage is physically on the Orchid module managed by the ConnectX-9.
② Atomic Claim
Rubin 先透過 C2C link 連到 Vera,再由 Vera 透過 PCIe6 lanes 連到 ConnectX-9。
- Epistemic Mode:
ASSERTED - Mapping Status:
PARTIAL
③ Semantic Frame
{
"frame_type": "NARY_RELATION",
"participants": [
{
"node": {
"id": "04_knowledge_base/Vera Rubin",
"label": "Rubin"
},
"role": "accelerator"
},
{
"node": {
"id": "04_knowledge_base/ConnectX-9",
"label": "ConnectX-9"
},
"role": "network_device"
},
{
"node": {
"id": "04_knowledge_base/PCIe",
"label": "PCIe6"
},
"role": "host_interface"
}
],
"qualifiers": {
"condition_text": "Vera and C2C are plain text in this source claim; not independently canonicalized here",
"numeric_mentions": [
"6"
],
"temporal_mentions": []
},
"relation_type": "RUBIN_TO_CONNECTX9_VIA_VERA"
}④ Canonical Entity Mapping
| Role | Surface Label | Canonical Target |
|---|---|---|
| accelerator | Rubin | 04_knowledge_base/Vera Rubin |
| network_device | ConnectX-9 | ConnectX-9 |
| host_interface | PCIe6 | PCIe |
⑤ Human Review
請在 Properties 逐項確認:
- 原文 → Atomic Claim 是否忠實
- Atomic Claim → Semantic Frame 是否忠實
- Canonical Entity mapping 是否正確
- Epistemic mode 是否保留原文語氣
- 最後選擇
review_action
Review state
Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。