VR2R-0130

① SA Source

Context Before

While the rack-level switching bandwidth has doubled, the number of NVLink Switch chips per rack has also doubled to 36, with each switch tray now housing 4 Switch chips. This means the new NVLink 6 Switch chip has the same 28.8T bandwidth as NVLink5 Switch, with half the number of ports but

Evidence

running at double the rate using ‘400G’ bi-directional SerDes.

Context After

This allows the high bandwidth switch design to remain as a single monolithic die, saving on design complexity.

② Atomic Claim

它使用 custom 400G bidirectional SerDes,以 2 倍 data rate 運作。

  • Epistemic Mode: ASSERTED
  • Mapping Status: PARTIAL

③ Semantic Frame

{
  "attribute": "NVLINK6_SERDES_RATE",
  "context_nodes": [],
  "entity": {
    "id": "04_knowledge_base/SerDes",
    "label": "SerDes"
  },
  "frame_type": "ATTRIBUTE",
  "qualifiers": {
    "condition_text": "主詞承接 VR2R-0129 的 NVLink 6 Switch",
    "numeric_mentions": [
      "400G",
      "2x"
    ],
    "temporal_mentions": []
  },
  "value": {
    "numeric_mentions": [
      "400G",
      "2x"
    ],
    "value_text": "custom 400G bidirectional SerDes runs at double the rate."
  }
}

④ Canonical Entity Mapping

RoleSurface LabelCanonical Target
entitySerDesSerDes

⑤ Human Review

請在 Properties 逐項確認:

  • 原文 → Atomic Claim 是否忠實
  • Atomic Claim → Semantic Frame 是否忠實
  • Canonical Entity mapping 是否正確
  • Epistemic mode 是否保留原文語氣
  • 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。