VR2R-0060_r1

VR2R-0060

① SA Source

• Source: 開啟完整 SA 文章
• Section: Rubin
• Line hint: 53

Context Before

Rubin’s design is a logical evolution from Blackwell, with

Evidence

the move to a 3nm process and disaggregating I/O into chiplets while keeping the same basic structure of 2 reticle-sized dies with 8 stacks of HBM.

Context After

35 PFLOPS dense FP4 is a 3.5x improvement over Blackwell GB200, achieved by:

② Atomic Claim

設計轉向 3nm process，並把 I/O 拆分到 chiplets，同時維持由 2 個 reticle-sized dies 與 8 stacks HBM 組成的基本結構。

• Epistemic Mode: ASSERTED
• Mapping Status: PARTIAL

③ Semantic Frame

{
  "frame_type": "NARY_RELATION",
  "participants": [
    {
      "node": {
        "id": "04_knowledge_base/Chiplet architecture",
        "label": "chiplets"
      },
      "role": "io_architecture"
    },
    {
      "node": {
        "id": "04_knowledge_base/HBM",
        "label": "HBM"
      },
      "role": "memory"
    }
  ],
  "qualifiers": {
    "condition_text": "I/O、reticle-sized die 與 3nm process 未 canonicalized；本 atomic claim 未明示 Rubin 主詞",
    "numeric_mentions": [
      "3nm",
      "2",
      "8"
    ],
    "temporal_mentions": []
  },
  "relation_type": "PROCESS_AND_IO_ARCHITECTURE_CHANGE"
}

④ Canonical Entity Mapping

Role	Surface Label	Canonical Target
io_architecture	chiplets	04_knowledge_base/Chiplet architecture
memory	HBM	HBM

⑤ Human Review

請在 Properties 逐項確認：

• 原文 → Atomic Claim 是否忠實
• Atomic Claim → Semantic Frame 是否忠實
• Canonical Entity mapping 是否正確
• Epistemic mode 是否保留原文語氣
• 最後選擇 review_action

Review state

Markdown 內文不是正式 approval。只有 Apply bridge 寫入的 Decision Ledger event 才是正式決策。